(1) Field of the Invention
This invention relates to processes for the manufacture of semiconductor devices and more particularly to a polysilicon test structure which can be used to detect and monitor the onset of electromigration in metal lines characteristic of integrated circuit interconnection metallurgy. The structure can be used for basic studies or it can be incorporated into a specially designed integrated circuit test chip and used as a highly sensitive line monitor.
(2) Description of Prior Art
The fabrication of integrated circuit chips involves the embedding of integrated circuit devices into a polished silicon wafer. The processes basically consist of device processing wherein the semiconductor devices and field isolation regions are formed within the silicon surface, and device personalization wherein the wafer receives two or more levels of interconnection metallurgy, separated by insulation. The first layer of metallization is used to define small fundamental circuits, for example, a simple CMOS inverter containing two complimentary MOS field effect transistors(MOSFETs). Additional layers of metal lines are then provided to interconnect these primary circuits into larger units. A final layer of metallization is applied to connect the circuits to pads Which form the chip's external connections. Connections between metal levels are made using metal filled via holes within an insulation layer.
Electromigration is a failure mechanism of these metal lines that has troubled integrated circuit technology since its very beginnings in the 1960s. The earliest circuit devices were immense, compared to their present sizes. Similarly, the dimensions of the metal lines used to interconnect these devices were also much larger than they are today. The currents which these metal lines were required to carry often exceeded 1.times.10.sup.5 amps/cm.sup.2. In the bipolar technology of that day it was the emitter current that reached such levels. Failure of the emitter stripe, which was made of pure aluminum, began to occur after many hours of temperature/humidity testing. Metal within the stripe was physically swept along the stripe by the strong electron current in what was called the "electron wind". As the metal was swept away, sections of the stripe became thinner. This resulted in an increase in current density in that region accompanied by a local rise in temperature which further hastened the failure. The results of the accelerated life testing were later confirmed by emitter stripe failures in the field at longer time intervals. Statistical analysis of these results confirmed that the failures were truly a weakness of the aluminum metallurgy itself. The phenomenon was called electromigration(EM). The fix for the problem came quickly. The pure aluminum metallurgy was replaced with alloys of aluminum containing small amounts of silicon, copper, titanium, or tungsten. These alloys exhibited various degrees of inhibition of the metal drift. Fortunately, as devices became smaller, operating voltages decreased somewhat and the current densities were kept in check with the assistance of better cooling. However, long term failure due to electromigration is still a major concern. In todays CMOS technology it is the power line current that causes electromigration failure exposure. The surface topology of the wafer has also become a concern with regard to metal line failures. Deposition of metal lines is commonly done by sputtering the metal from an aluminum alloy target. The presence of surface topological features in the areas where metal lines are deposited results in inadequate metal coverage. These features are often difficult to avoid. Metal lines frequently must traverse areas of underlying oxide field isolation regions which have ridges along their edges. Also lines crossing other lines on lower levels encounter dips and rises in topology. Local thinning of the metal lines over these features provide the weak spots for electromigration failures.
Consequently, various test structures have been designed to detect and monitor electromigration in susceptible circuits. One such structure, referred to by Chesire and Oates U.S. Pat. No. 5,264,377, is termed "SWEATS" (Standard Wafer-level Electromigration Acceleration Test). This structure is of the four-point-probe design (two pads 301 for current application and two pads 302 for voltage measurement) and consists of a metal stripe 303 with multiple narrow regions 311-317 (See FIG. 1). Testing is done by passing a larger than normal current (in excess of 1.times.10.sup.7 amp/c.sup.2 through the stripe while measuring the voltage drop along it. The narrow sections quickly rise in temperature providing the heat to accelerate the test without harming the surrounding structures on the wafer. The test is quick and can be done as a spot check during wafer processing. Unfortunately the rapidity with which it is performed and the uncertainty of temperature, only allows it to be used as a spot check. Consequently correlation with long term stress testing is lacking. Chesire and Oates described a structure similar to the SWEATS structure but without the wide and narrow regions. It consists of a straight metal stripe, again with the four-point-probe feature but also with additional metallization alongside the stripe to detect shorts, as well as transverse lines representing typical topography beneath the test stripe. This structure was basically designed for process monitoring purposes with quick turn-around times. It is driven by applied currents in,excess of 1.times.10.sup.7 amp/c.sup.2, and can give timely information for process adjustments within minutes. The design features more gradual temperature gradients, closer approximation to actual metallization geometries, and better correlation with long-term accelerated tests.
Recent advances in metal interconnection systems required by the trend towards miniaturization have made electromigration failure monitoring even more complex. The aluminum alloy lines are being fitted with adjacent thin layers of refractory metals and bimetallics consisting of titanium(Ti), titanium nitride(TiN), titanium-tungsten alloy(TiW), to name a few. These materials serve as diffusion barriers, adhesion promoters, anti-reflection coatings(ARC), and in other capacities that serve to improve bonding, lower contact resistance, and in general, improve the integrity of the overall interconnection system. For the purpose of this discussion, these layers will be referred to as barrier layer's. The barrier layers can occur at one or both interfaces of the aluminum alloy. The aluminum alloy is still the primary current carrier but the adjacent barrier layers also participate in the process. The testing procedures which concern these composite metal lines must now also include these barrier layers. When electromigration occurs in such a structure, the barrier layers remain intact and the aluminum alloy, which is sandwiched between them fails. The standard methods and structures which measure the resistivity of the failing line become impractical because no sudden increase in resistivity occurs when the line fails.
This invention describes an electromigration sensor which is located adjacent to a composite EM test line and measures the local heating produced by the electromigration in the aluminum alloy.